OpenHW Explorer
ExploreLearning HubResourcesNewsAbout
GitHub
OpenHW Explorer · Resources

Open Hardware Ecosystem & Resources

Find technical references and explore open hardware organizations and projects.

48
technical resources
34
ecosystem entries
Ecosystem map

Explore the open hardware landscape

A source-checked set of foundations, open silicon projects, process design kits, research institutions, and practical ways to participate.

Source-checked 2026-07-10

34 entries

OpenHW Foundation logo
FoundationsGlobal

OpenHW Foundation

Foundation initiative

Eclipse Foundation initiative developing and verifying industrial-grade open-source RISC-V cores and related IP.

CORE-VRISC-VOpen IP
Visit official site
RISC-V International logo
FoundationsGlobal

RISC-V International

Standards organization

Global standards organization stewarding the open RISC-V instruction set architecture and specifications.

ISAStandardsEcosystem
Visit official site
RISE Project logo
FoundationsGlobal

RISE Project

Linux Foundation project

Industry-led Linux Foundation Europe project accelerating open-source software readiness for RISC-V platforms.

RISC-VOpen SourceSoftware
Visit official site
CHIPS Alliance logo
FoundationsGlobal

CHIPS Alliance

Industry alliance

Linux Foundation alliance hosting open hardware designs, IP, and tools for silicon and FPGA development.

Open IPFPGATools
Visit official site
FOSSi Foundation logo
FoundationsGlobal

FOSSi Foundation

Non-profit foundation

Independent non-profit promoting and protecting free and open-source silicon and its supporting ecosystem.

Open SiliconCommunityEducation
Visit official site
Open Source Hardware Association logo
FoundationsGlobal

Open Source Hardware Association

Non-profit association

Non-profit supporting open hardware education, community events, and the Open Source Hardware certification program.

CertificationCommunityEducation
Visit official site
Open-Source FPGA Foundation logo
FoundationsGlobal

Open-Source FPGA Foundation

FPGA foundation

Open FPGA organization maintaining design resources, educational material, a virtual lab, and open EDA projects.

FPGAOpen EDAEducation
Visit official site
lowRISC logo
Silicon & EDAUnited Kingdom

lowRISC

Engineering organization

Open silicon organization and engineering team stewarding projects including OpenTitan and Ibex.

OpenTitanIbexEngineering
Visit official site
OpenTitan logo
Silicon & EDAGlobal

OpenTitan

Open silicon project

Open-source silicon root-of-trust project administered by lowRISC as a collaborative engineering program.

Root of TrustSecurityIbex
Visit official site
Caliptra logo
Silicon & EDAGlobal

Caliptra

Security project

CHIPS Alliance project providing reusable open-source Root of Trust hardware, firmware, and specifications for SoCs.

Root of TrustSecuritySoC
Visit official site
PULP Platform logo
Silicon & EDAEurope

PULP Platform

Academic platform

ETH Zurich and University of Bologna research platform for energy-efficient RISC-V cores, systems, and accelerators.

RISC-VAcceleratorsResearch
Visit official site
The OpenROAD Project logo
Silicon & EDAGlobal

The OpenROAD Project

EDA project

Open-source semiconductor design automation project focused on lowering barriers to digital chip implementation.

EDARTL-to-GDSPhysical Design
Visit official site
XiangShan logo
Silicon & EDAChina

XiangShan

Processor project

Stewarded by BOSC

High-performance open-source RISC-V processor project initiated by ICT, CAS and now developed by the XiangShan team at BOSC.

RISC-VHigh PerformanceCPU
Visit official site
OpenXuantie logo
Silicon & EDAChina

OpenXuantie

Open processor ecosystem

Open RISC-V processor and software ecosystem from T-Head, including CPU cores, toolchains, operating-system support, and AI libraries.

RISC-VCPUSoftware
Visit official site
SHAKTI logo
Silicon & EDAIndia

SHAKTI

Academic initiative

IIT Madras RISE initiative building an open-source ecosystem of RISC-V processors, SoCs, peripheral IP, and software.

RISC-VProcessorsSoC
Visit official site
Chipyard logo
Silicon & EDAUnited States

Chipyard

SoC framework

Open-source Chisel-based framework integrating RISC-V cores, accelerators, memory systems, simulation, and implementation flows.

RISC-VSoCChisel
Visit official site
YosysHQ logo
Silicon & EDAEurope

YosysHQ

EDA organization

Maintainer organization for Yosys and the OSS CAD Suite, anchoring a widely used open-source synthesis and FPGA tool ecosystem.

YosysSynthesisFPGA
Visit official site
iEDA logo
Silicon & EDAChina

iEDA

EDA project

Open-source EDA platform covering digital physical implementation and analysis tools for chip design and research.

Open EDAPhysical DesignResearch
Visit official site
SkyWater SKY130 logo
Open PDKsUnited States

SkyWater SKY130

Foundry-linked open PDK

Experimental open release

Open PDK for SkyWater's 130 nm CMOS process. It supports manufacturable designs, while the public release remains an experimental preview rather than a production-qualified kit.

130 nmFoundry-linkedCMOS
Visit official site
Tools, licensing & fabrication
Public files
Process documentation, device models, standard-cell and I/O libraries.
License
Apache-2.0; retain notices in the individual libraries.
Upstream tool support
Raw foundry files need tool-specific setup; open_pdks prepares installations for open-source flows.
Manufacturing
Based on a manufactured process, but this public release is experimental, not production-qualified. Confirm current fabrication access with a shuttle or foundry.
  • SKY130 repository
  • open_pdks

Sources reviewed: 2026-09-13

GlobalFoundries GF180MCU logo
Open PDKsGlobal

GlobalFoundries GF180MCU

Foundry-linked open PDK

Experimental open release

Open PDK for GlobalFoundries' 180 nm MCU process. It targets manufacturable designs at GF, but the public release remains an experimental preview not intended for production use.

180 nmFoundry-linkedMixed Signal
Visit official site
Tools, licensing & fabrication
Public files
180 nm MCU process documentation, device models and libraries supplied through submodules.
License
Apache-2.0; check the notices in each downloaded submodule.
Upstream tool support
Tool setup is separate from the raw PDK; open_pdks includes a GF180MCU installation target.
Manufacturing
Foundry-derived experimental public release. Availability and acceptance of a design must be confirmed with a fabrication provider.
  • GF180MCU repository
  • open_pdks

Sources reviewed: 2026-09-13

IHP SG13G2 logo
Open PDKsGermany

IHP SG13G2

Foundry-linked open PDK

Preview release

Open PDK for IHP's 130 nm SiGe BiCMOS process, aimed at analog, mixed-signal, and RF design. The public release is a preview rather than a production-qualified kit.

130 nmSiGe BiCMOSRF
Visit official site
Tools, licensing & fabrication
Public files
BiCMOS device models, standard-cell, I/O and SRAM views, layout rules and tool data.
License
Apache-2.0.
Upstream tool support
Upstream lists KLayout, Magic, ngspice, Xyce, xschem and digital flows; tested versions are recorded in versions.txt.
Manufacturing
Targets IHP SG13G2. The public PDK is still labelled preview, not intended for production; confirm design acceptance and MPW access with IHP.
  • IHP PDK and tested tool versions

Sources reviewed: 2026-09-13

ICsprout55 logo
Open PDKsChina

ICsprout55

Foundry-linked preview PDK

Research and small-batch use

Open 55 nm CMOS PDK from Zhejiang ICsprout. Its current preview targets research, education, and small-batch validation, and is not qualified for commercial mass production.

55 nmPreviewCMOS
Visit official site
Tools, licensing & fabrication
Public files
Published IP/library and technology LEF files. RAM, DRC/LVS, SPICE and other deliverables remain on the README TODO list.
License
Apache-2.0.
Upstream tool support
Release archives are fetched with make unzip. A complete, version-tested public sign-off flow is not established by the README.
Manufacturing
The project identifies an ICsprout 55 nm process. Public files alone do not establish a currently bookable shuttle or production-ready kit.
  • ICsprout55 scope and TODO

Sources reviewed: 2026-09-13

NCSU FreePDK45 logo
Open PDKsUnited States

NCSU FreePDK45

Predictive research PDK

Not manufacturable

Generic predictive 45 nm CMOS process kit from NC State for teaching and design research. It is not tied to a foundry process and cannot be used to fabricate chips.

45 nmPredictiveEducation
Visit official site
Tools, licensing & fabrication
Public files
Predictive 45 nm devices, design rules and reference implementation material.
License
Use the distribution's licenses; the SVRF rule decks have a separate EULA.
Upstream tool support
Documented flows include commercial Cadence, Calibre and HSPICE tools; an open PDK does not make those tools free.
Manufacturing
Predictive academic kit, not a foundry manufacturing process.
  • NC State FreePDK45 documentation and licenses

Sources reviewed: 2026-09-13

ASAP7 logo
Open PDKsUnited States

ASAP7

Predictive research PDK

Not manufacturable

Predictive 7 nm FinFET PDK distributed for academic physical-design research and benchmarking. It models an advanced node but is not a foundry-qualified manufacturing kit.

7 nmFinFETPredictive
Visit official site
Tools, licensing & fabrication
Public files
Predictive 7 nm FinFET PDK and standard-cell libraries.
License
PDK and libraries: BSD-3-Clause. Calibre decks are distributed separately; review their download terms.
Upstream tool support
OpenROAD digital flows are available. Full custom/sign-off examples may require commercial tools and separately downloaded Calibre decks.
Manufacturing
Predictive research technology, not a tape-out service.
  • ASAP7 distribution and exclusions

Sources reviewed: 2026-09-13

PKP3 logo
Open PDKsChina

PKP3

Predictive GAA research PDK

Not manufacturable

Open predictive 3 nm gate-all-around PDK from Peking University for advanced-node EDA and circuit research. It is an academic model, not a manufacturable foundry kit.

3 nmGAAPredictive
Visit official site
Tools, licensing & fabrication
Public files
Predictive 3 nm GAA models, PCells, rule decks, standard cells and SRAM examples.
License
The project specifies academic/research use. Check the downloaded package's terms before redistribution or commercial use.
Upstream tool support
Cadence Virtuoso technology files and Calibre decks; version 1.1 adds StarRC extraction assets. These are commercial tools.
Manufacturing
The project explicitly states designs are not manufacturable at any foundry.
  • PKP3 scope, versions and restrictions

Sources reviewed: 2026-09-13

OpenRPDK28 logo
Open PDKsChina

OpenRPDK28

Academic PDK template

Under construction

Early open 28 nm reference PDK project from RIOS Lab. The repository describes preliminary academic material rather than a complete, foundry-qualified production kit.

28 nmAcademicPreliminary
Visit official site
Tools, licensing & fabrication
Public files
Academic 28 nm process template and research material; the project is marked under construction.
License
Repository license: MIT. Third-party material keeps its own terms.
Upstream tool support
Contains research and OpenLane-related directories; this is not evidence of a complete qualified sign-off flow.
Manufacturing
No qualified manufacturing or bookable MPW service established by this repository.
  • OpenRPDK28 current repository

Sources reviewed: 2026-09-13

ODE4EC logo
ResearchEurope

ODE4EC

European initiative

Pan-European initiative building an open design environment and a healthier open-source chip design ecosystem.

Open EDATalentEurope
Visit official site
Fondazione Chips-IT logo
ResearchItaly

Fondazione Chips-IT

National research foundation

Italy's national research and technology foundation for integrated-circuit design, with dedicated work on digital design and open hardware.

Open HardwareIC DesignRISC-V
Visit official site
Beijing Institute of Open Source Chip logo
ResearchChina

Beijing Institute of Open Source Chip

Non-profit research institute

Steward of XiangShan

Non-profit research institute advancing open RISC-V technology, collaborative innovation, and industrial adoption in China.

RISC-VResearchIndustry
Visit official site
RIOS Lab logo
ResearchChina

RIOS Lab

Research laboratory

Shenzhen-based open-source systems research lab working on RISC-V chips, OpenEDA, OpenPDK, and reusable hardware IP.

RISC-VOpen EDAResearch
Visit official site
Tiny Tapeout logo
ParticipateGlobal

Tiny Tapeout

Education & tapeout platform

Education-focused platform and shuttle program that makes designing and manufacturing a small chip approachable.

TapeoutEducationASIC
Visit official site
One Student One Chip logo
ParticipateChina

One Student One Chip

Education & tapeout program

Open processor education program guiding learners through full-stack RISC-V system design toward their own taped-out chip.

EducationRISC-VTapeout
Visit official site
ChipFoundry logo
ParticipateGlobal

ChipFoundry

MPW platform

Accessible chip prototyping and MPW shuttle platform using open-source tools, reference designs, and open PDKs.

TapeoutOpen PDKPrototyping
Visit official site
Open Hardware Repository logo
ParticipateGlobal

Open Hardware Repository

Open design repository

CERN-founded catalogue for discovering open hardware designs and the communities maintaining them.

DesignsCERN OHLCommunity
Visit official site
Technical library

Browse resources by task

Showing

Standards & Documentation

Authoritative RISC-V specifications, working documentation, formal models, and OpenHW project documentation.

5 links
standard

RISC-V Ratified Specifications Library

Browsable index for ratified RISC-V ISA, platform, and ABI specifications.

RISC-VSpecificationsISA
Open resource
standard

RISC-V Specification Development Dashboard

Status tracker for in-progress RISC-V specifications and ratification stages.

RISC-VSpecificationsGovernance
Open resource
standard

Formal Specification of the RISC-V ISA (Sail)

Executable ISA model used for conformance, testing, and formal reasoning.

RISC-VSailFormal
Open resource
standard

RISC-V ISA Manuals (GitHub)

Source repository for privileged and unprivileged ISA manuals, including drafts.

RISC-VISAManuals
Open resource
official

RISC-V Technical Wiki

Working documentation for technical groups, task groups, and specification process.

RISC-VTechnical GroupsSpecifications
Open resource

Sources & attribution

Technical links were seeded from RISC-V Ottawa and independently reorganized; ecosystem entries are checked against their official sites.

External sites, names, and marks remain the property of their respective owners and follow their own terms.

RISC-V Ottawa ResourcesSource repository
OpenHW Explorer
LicensingProject GitHubFeedback ↗OpenHW GitHubOpenHW Foundation websiteDocumentation
Alex ChenLinkedIn

OpenHW Explorer is an independent community project and is not an official OpenHW Foundation website.